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data sheet no. pd65001 high and low side driver in die wafer form www.irf.com 1 ir2110c/IR2113C note: c this ir product is100% tested at wafer level and is manufactured using established, mature and well characterized processes. due to restrictions in die level processing, die may not be equivalent to standard package products and are therefore offered with a conditional performance guarantee.the above data sheet is based on ir sample testing under certain predetermined and assumed conditions, and are provided for illustration purposes only. customers are encouraged to perform testing in actual proposed packaged and use conditions. ir die products are tested using ir-based quality assurance procedures and are manufactured using ir?s established processes. programs for customer-specified testing are available upon request. ir has experienced assembly yields of generally 95% or greater for individual die; however, customer?s results will vary. estimates such as those described and set forth in this data sheet for semiconductor die will vary depending on a number of packaging, handling, use and other factors. sold die may not perform on an equivalent basis to standard package products and are therefore offered with a limited warranty as described in ir?s applicable standard terms and conditions of sale. all ir die sales are subject to ir?s applicable standard terms and conditions of sale, which are available upon request. for customers requiring a particular parameter to be guaranteed, special testing can be carried out or product can be purchased as known good die. d part number shown is for die in wafer. contact factory for these other options. typical connection ? 100 % tested at probe c ? available in chip pack, unsawn wafer, sawn on film d ? floating channel designed for bootstrap operation fully operational to +500v or +600v tolerant to negative transient voltage dv/dt immune ? gate drive supply range from 10 to 20v ? undervoltage lockout for both channels ? 3.3v logic compatible separate logic supply range from 3.3v to 20v logic and power ground 5v offset ? cmos schmitt-triggered inputs with pull-down ? cycle by cycle edge-triggered shutdown logic ? matched propagation delay for both channels ? outputs in phase with inputs features hin up to 500v or 600v to load v dd v b v s ho lo com hin lin v ss sd v cc lin v dd sd v ss v cc (refer to the die outlines for correct pin configuration). this/these diagram(s) show electrical connections only. please refer to our application notes and designtips for proper circuit board layout. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
2 www.irf.com ir2110c/IR2113C description the ir2110/ir2113 are high voltage, high speed power mosfet and igbt drivers with independent high and low side referenced output channels. proprietary hvic and latch immune cmos technologies enable rugge- dized monolithic construction. logic inputs are compatible with standard cmos or lsttl output, down to 3.3v logic. the output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. propagation delays are matched to simplify use in high frequency applications. the floating channel can be used to drive an n-channel power mosfet or igbt in the high side configuration which operates up to 500 or 600 volts. absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. additional information is shown in figures 28 through 35. symbol definition min. max. units v b high side floating supply voltage (ir2110) -0.3 525 (ir2113) -0.3 625 v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v cc low side fixed supply voltage -0.3 25 v lo low side output voltage -0.3 v cc + 0.3 v dd logic supply voltage -0.3 v ss + 25 v ss logic supply offset voltage v cc - 25 v cc + 0.3 v in logic input voltage (hin, lin & sd) v ss - 0.3 v dd + 0.3 dv s /dt allowable offset supply voltage transient (figure 2) ? 50 v/ns t j junction temperature ? 150 t s storage temperature -55 150 v c www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
www.irf.com 3 ir2110c/IR2113C note 1: logic operational for v s of -4 to +500v. logic state held for v s of -4v to -v bs . (please refer to the design tip dt97-3 for more details). note 2: when v dd < 5v, the minimum v ss offset is limited to -v dd. recommended operating conditions the input/output logic timing diagram is shown in figure 1. for proper operation the device should be used within the recommended conditions. the v s and v ss offset ratings are tested with all supplies biased at 15v differential. typical ratings at other bias conditions are shown in figures 36 and 37. symbol definition min. max. units v b high side floating supply absolute voltage v s + 10 v s + 20 v s high side floating supply offset voltage (ir2110) note 1 500 (ir2113) note 1 600 v ho high side floating output voltage v s v b v cc low side fixed supply voltage 10 20 v lo low side output voltage 0 v cc v dd logic supply voltage v ss + 3 v ss + 20 v ss logic supply offset voltage -5 (note 2) 5 v in logic input voltage (hin, lin & sd) v ss v dd t a ambient temperature -40 125 c v www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
4 www.irf.com ir2110c/IR2113C symbol definition figure min. typ. max. units test conditions v ih logic ?1? input voltage 12 9.5 ? ? v il logic ?0? input voltage 13 ? ? 6.0 v oh high level output voltage, v bias - v o 14 ? ? 1.2 i o = 0a v ol low level output voltage, v o 15 ? ? 0.1 i o = 0a i lk offset supply leakage current 16 ? ? 50 v b =v s = 500v/600v i qbs quiescent v bs supply current 17 ? 125 230 v in = 0v or v dd i qcc quiescent v cc supply current 18 ? 180 340 v in = 0v or v dd i qdd quiescent v dd supply current 19 ? 15 30 v in = 0v or v dd i in+ logic ?1? input bias current 20 ? 20 40 v in = v dd i in- logic ?0? input bias current 21 ? ? 1.0 v in = 0v v bsuv+ v bs supply undervoltage positive going 22 7.5 8.6 9.7 threshold v bsuv- v bs supply undervoltage negative going 23 7.0 8.2 9.4 threshold v ccuv+ v cc supply undervoltage positive going 24 7.4 8.5 9.6 threshold v ccuv- v cc supply undervoltage negative going 25 7.0 8.2 9.4 threshold i o+ output high short circuit pulsed current 26 2.0 2.5 ? v o = 0v, v in = v dd pw 10 s i o- output low short circuit pulsed current 27 2.0 2.5 ? v o = 15v, v in = 0v pw 10 s static electrical characteristics v bias (v cc , v bs , v dd ) = 15v, t a = 25c and v ss = com unless otherwise specified. the v in , v th and i in parameters are referenced to v ss and are applicable to all three logic input leads: hin, lin and sd. the v o and i o parameters are referenced to com and are applicable to the respective output leads: ho or lo. v a v a mechanical data nominal front metal composition, thickness al-si (si: 1.0% 0.1%), 2 m wafer diameter 125mm with std. <100> flat wafer thickness 625 25 m minimum street width 0.006? reject ink dot size 0.02? ? 0.03? recommended storage environment store in original container, in dessicated nitrogen, with no contamination. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
www.irf.com 5 ir2110c/IR2113C bonding pad definitions symbol description v dd logic supply hin logic input for high side gate driver output (ho), in phase sd logic input for shutdown lin logic input for low side gate driver output (lo), in phase v ss logic ground v b high side floating supply ho high side gate drive output v s high side floating supply return v cc low side supply lo low side gate drive output com low side return functional block diagram v b sd lin v dd pulse gen r s q v ss uv detect delay hv level shift v cc pulse filter uv detect v dd /v cc level shift v dd /v cc level shift lo v s com r s q r s rq hin ho www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
6 www.irf.com ir2110c/IR2113C thickness of gate oxide 800 ? connections material poly silicon first width 4.0 m layer spacing 6.0 m thickness 5000? material al - si (si: 1.0% 0.1%) second width 6.0 m layer spacing 9.0 m thickness 20,000? contact hole dimension 5.0 m x 5.0 m insulation layer material psg (sio 2 ) thickness 1.5 m passivation material psg (sio 2 ) thickness 1.6 m method of saw full cut method of die bond ablebond 84 - 1 wire bond method thermosonic material au (1.3 mil) leadframe material cu die area ag lead plating 70-90% sn (balance pb) package types 14-lead pdip & 16-lead soic materials eme6300 / eme6600ra remarks: * patent pending device information process & design rule hvdcmos 600v transistor count ir2110 168 ir2113 220 die size: ir2110 98 x 120 mils ir2113 131 x 99 mils die outline ir2110 die outline ir2113 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
www.irf.com 7 ir2110c/IR2113C all pad sizes are 0.004 x 0.004 inches. all units are in inches. die outline: ir2110c (in inches) pad datum # function x y pad size 1 vb 0.0000 0.0000 0.0055 x 0.0065 2 ho 0.0265 0.0029 0.0055 x 0.0061 3 vdd 0.0761 -0.0018 0.0059 x 0.0059 4 in3 0.0761 0.0136 0.0058 x 0.0057 5 sd 0.0761 0.0364 0.0058 x 0.0057 6 lin -0.0761 0.0591 0.0057 x 0.0057 7 vss -0.0784 0.0942 0.0053 x 0.0073 8 lo 0.0239 0.0927 0.0055 x 0.0061 9 com -0.0022 0.0951 0.0055 x 0.0061 10 vcc -0.0026 0.0544 0.0055 x 0.0065 11 vs 0.0004 0.0408 0.0055 x 0.0061 x and y tolerances +/- 0.0002 datum point on pad 9 8 10 7 6 5 11 4 3 2 1 die edge metal edge 0.098 ? / ? 0.008 0.120 + / ? 0.008 y = 0.0000 y = -0.0059 y = -0.0107 x = -0.0093 x = -0.0076 x = 0.0000 major flat www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
8 www.irf.com ir2110c/IR2113C all pad sizes are 0.004 x 0.004 inches. all units are in inches. die outline: IR2113C (in inches) 15 14 13 12 11 8 6 7 3 1 2 datum point on pad major flat die edge metal edge 0.131 + / ? 0.008 0.099 + / ? 0.008 0.0000 -0.0028 -0.0059 -0.0080 -0.0031 0.0000 pad datum # function x y pad size 1 lo 0.0020 0.0274 0.0061 x 0.0058 2 com 0.0000 0.0000 0.0061 x 0.0058 3 vcc 0.0426 -0.0007 0.0059 x 0.0059 6 vs 0.0559 0.0040 0.0061 x 0.0058 7 vb 0.1062 0.0032 0.0059 x 0.0059 8 ho 0.1042 0.0198 0.0061 x 0.0058 11 vdd 0.1098 0.0815 0.0060 x 0.0060 12 hin 0.0726 0.0803 0.0060 x 0.0060 13 sd 0.0488 0.0803 0.0060 x 0.0060 14 lin 0.0252 0.0803 0.0060 x 0.0060 15 vss -0.0009 0.0819 0.0060 x 0.0060 x and y tolerances +/- 0.0002 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
www.irf.com 9 ir2110c/IR2113C figure 1. input/output timing diagram figure 2. floating supply voltage transient test circuit figure 3. switching time test circuit figure 4. switching time waveform definition figure 6. delay matching waveform definitions figure 5. shutdown waveform definitions hin lin t r t on t f t off ho lo 50% 50% 90% 90% 10% 10% hin lin ho 50% 50% 10% lo 90% mt ho lo mt sd t sd ho lo 50% 90% 10 f 0.1 f v =15v cc 9 36 5 7 1 2 13 12 11 10 hin sd lin ho lo 0.1 f 10 f 10 f c l c l v b + - s v (0 to 500v/600v) 15v 10 f 0.1 f v =15v cc 9 36 5 7 1 2 13 12 11 10 ho 0.1 f output monitor 10kf6 10kf6 200 h 10kf6 100 f + irf820 hv = 10 to 500v/600v dv s >50 v/ns dt www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
10 www.irf.com ir2110c/IR2113C figure 8a. turn-off time vs. temperature figure 7a. turn-on time vs. temperature figure 7b. turn-on time vs. v cc /v bs supply voltage 0 50 100 150 200 250 10 12 14 16 18 20 turn-on delay time (ns) max. typ. 0 50 100 150 200 250 -50 -25 0 25 50 75 100 125 temperature (c) turn-on delay time (ns) max. typ. 0 50 100 150 200 250 -50 -25 0 25 50 75 100 125 temperature (c) turn-off delay time (ns) max. typ. 0 50 100 150 200 250 0 2 4 6 8 101214161820 ma x . ty p . figure 7c. turn-on time vs. vdd supply voltage figure 8b. turn-off time vs. v cc /v bs supply voltage 0 50 100 150 200 250 10 12 14 16 18 20 turn-off delay time (ns) max. typ. 0 50 100 150 200 250 0246810121416182 0 ma x . ty p figure 8c. turn-off time vs. v dd supply voltage v dd supply voltage (v) turn-on delay time (ns) v cc /v bs supply voltage (v) v cc /v bs supply voltage (v) v dd supply voltage (v) turn-off delay time (ns) www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
www.irf.com 11 ir2110c/IR2113C figure 9b. shutdown time vs. v cc /v bs supply voltage figure 9a. shutdown time vs. temperature 0 50 100 150 200 250 10 12 14 16 18 20 shutdown delay time (ns) max. typ. 0 50 100 150 200 250 -50 -25 0 25 50 75 100 125 temperature (c) shutdown delay time (ns) max. typ. 0 50 100 150 200 250 02468101214161820 vdd supply voltage (v) max . t yp shutdown delay time (ns) figure 9c. shutdown time vs. v dd supply voltage figure 10a. turn-on rise time vs. temperature 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 temperature (c) turn-on rise time (ns) max. typ. figure 10b. turn-on rise time vs. voltage 0 20 40 60 80 100 10 12 14 16 18 20 v bias supply voltage (v) turn-on rise time (ns) max. typ. figure 11a. turn-off fall time vs. temperature 0 10 20 30 40 50 -50 -25 0 25 50 75 100 125 temperature (c) turn-off fall time (ns) max. typ. v cc /v bs supply voltage (v) www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
12 www.irf.com ir2110c/IR2113C figure 11b. turn-off fall time vs. voltage 0 10 20 30 40 50 10 12 14 16 18 20 v bias supply voltage (v) turn-off fall time (ns) max. typ. figure 12a. logic ?1? input threshold vs. temperature 0.0 3.0 6.0 9.0 12.0 15.0 -50 -25 0 25 50 75 100 125 temperature (c) logic "1" input threshold (v) min. max figure 12b. logic ?1? input threshold vs. voltage figure 13a. logic ?0? input threshold vs. temperature 0.0 3.0 6.0 9.0 12.0 15.0 -50 -25 0 25 50 75 100 125 temperature (c) logic "0" input threshold (v) max. min. figure 13b. logic ?0? input threshold vs. voltage figure 14a. high level output vs. temperature 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) high level output voltage (v) max. logic " 1" input threshold (v) 0 3 6 9 12 15 0 2 4 6 8 10 12 14 16 18 20 max. v dd logic supply voltage (v) 0 3 6 9 12 15 02468101214161820 min . logic "0" input threshold (v) v dd logic supply voltage (v) www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
www.irf.com 13 ir2110c/IR2113C figure 14b. high level output vs. voltage 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v bias supply voltage (v) high level output voltage (v) m ax. figure 15a. low level output vs. temperature 0.00 0.20 0.40 0.60 0.80 1.00 -50 -25 0 25 50 75 100 125 temperature (c) low level output voltage (v) max. figure 15b. low level output vs. voltage 0.00 0.20 0.40 0.60 0.80 1.00 10 12 14 16 18 20 v bias supply voltage (v) low level output voltage (v) m ax. figure 16a. offset supply current vs. temperature 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature (c) offset supply leakage current (a) max. figure 16b. offset supply current vs. voltage 0 100 200 300 400 500 0 100 200 300 400 500 600 v b boost voltage (v) offset supply leakage current (a) max. ir2110 ir2113 figure 17a. v bs supply current vs. temperature 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature (c) v bs supply current (a) max. typ. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
14 www.irf.com ir2110c/IR2113C figure 19b. v dd supply current vs. v dd voltage figure 20a. logic ?1? input current vs. temperature 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 temperature (c) logic "1" input bias current (a) max. typ. figure 17b. v bs supply current vs. voltage 0 100 200 300 400 500 10 12 14 16 18 20 v bs floating supply voltage (v) v bs supply current (a) max. typ. figure 18a. v cc supply current vs. temperature 0 125 250 375 500 625 -50 -25 0 25 50 75 100 125 temperature (c) v cc supply current (a) max. typ. figure 18b. v cc supply current vs. voltage 0 125 250 375 500 625 10 12 14 16 18 20 v cc fixed supply voltage (v) v cc supply current (a) max. typ. figure 19a. v dd supply current vs. temperature 0 20 40 60 80 100 -50 -25 0 25 50 75 100 125 temperature (c) v dd supply current (a) max. typ. 0 10 20 30 40 50 60 02468101214161820 v dd supply current ( a) v dd logic supply voltage (v) www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
www.irf.com 15 ir2110c/IR2113C figure 21a. logic ?0? input current vs. temperature figure 21b. logic ?0? input current vs. v dd voltage figure 20b. logic ?1? input current vs. v dd voltage 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) logic "0" input bias current (a) max. 6.0 7.0 8.0 9.0 10.0 11.0 -50 -25 0 25 50 75 100 125 temperature (c) v bs undervoltage lockout + (v) max. typ. min. figure 22. v bs undervoltage (+) vs. temperature figure 23. v bs undervoltage (-) vs. temperature 6.0 7.0 8.0 9.0 10.0 11.0 -50 -25 0 25 50 75 100 125 temperature (c) v bs undervoltage lockout - (v) max. typ. min. 6.0 7.0 8.0 9.0 10.0 11.0 -50 -25 0 25 50 75 100 125 temperature (c) v cc undervoltage lockout + (v) max. typ. min. figure 24. v cc undervoltage (+) vs. temperature logic ?1? input bias current ( a) v dd logic supply voltage (v) 0 10 20 30 40 50 60 02468101214161820 logic ?0? input bias current ( a) v dd logic supply voltage (v) 0 1 2 3 4 5 02468101214161820 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
16 www.irf.com ir2110c/IR2113C figure 26b. output source current vs. voltage 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v bias supply voltage (v) output source current (a) min. typ. figure 27a. output sink current vs. temperature 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) output sink current (a) min. typ. figure 27b. output sink current vs. voltage 0.00 1.00 2.00 3.00 4.00 5.00 10 12 14 16 18 20 v bias supply voltage (v) output sink current (a) min. typ. figure 25. v cc undervoltage (-) vs. temperature 6.0 7.0 8.0 9.0 10.0 11.0 -50 -25 0 25 50 75 100 125 temperature (c) v cc undervoltage lockout - (v) max. typ. min. figure 26a. output source current vs. temperature 0.00 1.00 2.00 3.00 4.00 5.00 -50 -25 0 25 50 75 100 125 temperature (c) output source current (a) min. typ. figure 28. maximum v s negative offset vs. v bs supply voltage -10.0 -8.0 -6.0 -4.0 -2.0 0.0 10 12 14 16 18 20 v bs floating supply voltage (v) v s offset supply voltage (v) typ. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
www.irf.com 17 ir2110c/IR2113C figure 29. maximum v ss positive offset vs. v cc supply voltage 0.0 4.0 8.0 12.0 16.0 20.0 10 12 14 16 18 20 v cc fixed supply voltage (v) v ss logic supply offset voltage (v) typ. www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet
18 www.irf.com ir2110c/IR2113C additional testing and screening for customers requiring product supplied as known good die (kgd) or requiring specific die level testing, please contact your local ir sales. shipping three shipping options are offered as standard. ? un-sawn wafer ? die in waffle pack ? die on film tape and reel is also availa ble for some products. please specify your required shipping option when requesting prices and ordering die product. if not specified, un-sawn wafer will be assumed. handling ? product must be handled only at esd safe workstations. standard esd precautions and safe work environments are as defined in mil-hdbk-263. ? product must be handled only in a class 10,000 or better-designated clean room environment. ? singulated die are not to be handled with tweezers. a vacuum wand with a non-metallic esd protected tip should be used. wafer/die storage ? proper storage conditions are necessary to prevent product contamination and/or degradation after shipment. ? un-sawn wafers and singulated die can be stored for up to 12 months when in the original sealed packaging at room temperature (45% +/- 15% rh controlled environment). ? un-sawn wafers and singulated die that have been opened can be stored when returned to their containers and placed in a nitrogen purged cabinet, at room temperature (45% +/- 15% rh controlled environment). ? note: to reduce the risk of contamination or degradation, it is recommended that product not being used in the assembly process be returned to their original containers and resealed with a vacuum seal process. ? sawn wafers on a film frame are intended for immediate use and have a limited shelf life. ? die in surf tape type carrier tape are intended for immediate use and have a limited shelf life. this is primarily due to the nature of the adhesive tape used to hold the product in the carrier tape cavity. this product can be stored for up to 30 days. this applies whether or not the material has remained in its original sealed container. for further information: please contact your local ir sales office or email your e nquiry to http://die.irf.com ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 visit us at www.irf.com for sales contact information . 10/31/2005 www.datasheet www.datasheet www.datasheet www.datasheet 4u 4u4u 4u .com .com .com .com 4 .com u datasheet

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